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authorNiklas Cassel <niklas.cassel@linaro.org>2019-07-25 12:41:32 +0200
committerViresh Kumar <viresh.kumar@linaro.org>2019-07-26 09:58:59 +0200
commita409906003a2b5418e6e60ac2524948ea80819f2 (patch)
tree51d725f7d31ca732d5a91e23f3dd63a3e5cf1965 /Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
parentdt-bindings: opp: Re-organise kryo cpufreq to use it for other nvmem based qc... (diff)
downloadlinux-a409906003a2b5418e6e60ac2524948ea80819f2.tar.xz
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dt-bindings: opp: qcom-nvmem: Make speedbin related properties optional
Not all Qualcomm platforms need to care about the speedbin efuse, nor the value blown into the speedbin efuse. Therefore, make the nvmem-cells and opp-supported-hw properties optional. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Ilia Lin <ilia.lin@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt')
-rw-r--r--Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
index 198441e80ba8..c5ea8b90e35d 100644
--- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
+++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
@@ -20,6 +20,10 @@ In 'cpus' nodes:
In 'operating-points-v2' table:
- compatible: Should be
- 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
+
+Optional properties:
+--------------------
+In 'operating-points-v2' table:
- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
efuse registers that has information about the
speedbin that is used to select the right frequency/voltage