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author | Kishon Vijay Abraham I <kishon@ti.com> | 2015-12-21 09:54:11 +0100 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2015-12-21 09:56:27 +0100 |
commit | 3f2362c56f7ab0bf2ca1281227ca61f77c0c63fd (patch) | |
tree | f40e8ed06351192a9a77706555059d7acf316201 /Documentation/devicetree/bindings/phy/ti-phy.txt | |
parent | phy: ti-pipe3: use *syscon* framework API to power on/off the PHY (diff) | |
download | linux-3f2362c56f7ab0bf2ca1281227ca61f77c0c63fd.tar.xz linux-3f2362c56f7ab0bf2ca1281227ca61f77c0c63fd.zip |
phy: ti-pipe3: use *syscon* framework API to set PCS value of the PHY
Deprecate using phy-omap-control driver to set PCS value of the PHY
and start using *syscon* API to do the same.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy/ti-phy.txt')
-rw-r--r-- | Documentation/devicetree/bindings/phy/ti-phy.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt index e06f980fa2ba..49e5b0c6ed87 100644 --- a/Documentation/devicetree/bindings/phy/ti-phy.txt +++ b/Documentation/devicetree/bindings/phy/ti-phy.txt @@ -83,6 +83,8 @@ Optional properties: - syscon-pllreset: Handle to system control region that contains the CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0 register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy. + - syscon-pcs : phandle/offset pair. Phandle to the system control module and the + register offset to write the PCS delay value. Deprecated properties: - ctrl-module : phandle of the control module used by PHY driver to power on |