diff options
author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2020-01-30 07:52:40 +0100 |
---|---|---|
committer | Kishon Vijay Abraham I <kishon@ti.com> | 2020-03-20 15:04:29 +0100 |
commit | f13200bb63748918c63ac6a4c8ea554803359343 (patch) | |
tree | e4646ae06ef1098118b0bdade53ff9b398ee3bdc /Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt | |
parent | phy: socionext: Use devm_platform_ioremap_resource() (diff) | |
download | linux-f13200bb63748918c63ac6a4c8ea554803359343.tar.xz linux-f13200bb63748918c63ac6a4c8ea554803359343.zip |
dt-bindings: phy: socionext: Add Pro5 support and remove Pro4 from usb3-hsphy
This adds compatible string for Pro5 SoC that needs to manage gio clock
and reset. And Pro4 SoC uses USB2 PHY instead of USB3 HS-PHY, so this
removes Pro4 description from usb3-hsphy.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt')
-rw-r--r-- | Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt b/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt index e8d8086a7ae9..093d4f08705f 100644 --- a/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt +++ b/Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt @@ -7,7 +7,7 @@ this describes about High-Speed PHY. Required properties: - compatible: Should contain one of the following: - "socionext,uniphier-pro4-usb3-hsphy" - for Pro4 SoC + "socionext,uniphier-pro5-usb3-hsphy" - for Pro5 SoC "socionext,uniphier-pxs2-usb3-hsphy" - for PXs2 SoC "socionext,uniphier-ld20-usb3-hsphy" - for LD20 SoC "socionext,uniphier-pxs3-usb3-hsphy" - for PXs3 SoC @@ -16,13 +16,13 @@ Required properties: - clocks: A list of phandles to the clock gate for USB3 glue layer. According to the clock-names, appropriate clocks are required. - clock-names: Should contain the following: - "gio", "link" - for Pro4 SoC + "gio", "link" - for Pro5 SoC "phy", "phy-ext", "link" - for PXs3 SoC, "phy-ext" is optional. "phy", "link" - for others - resets: A list of phandles to the reset control for USB3 glue layer. According to the reset-names, appropriate resets are required. - reset-names: Should contain the following: - "gio", "link" - for Pro4 SoC + "gio", "link" - for Pro5 SoC "phy", "link" - for others Optional properties: |