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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2020-04-16 14:19:07 +0200
committerFelipe Balbi <balbi@kernel.org>2020-05-25 10:09:38 +0200
commit40f6706862c4c99c7432cd2a99404fb70a876c55 (patch)
tree99c306ba580db509cb2783bd66f51ef57dceeb9c /Documentation/devicetree/bindings/phy
parentarm64: dts: amlogic: use the new USB control driver for GXL and GXM (diff)
downloadlinux-40f6706862c4c99c7432cd2a99404fb70a876c55.tar.xz
linux-40f6706862c4c99c7432cd2a99404fb70a876c55.zip
phy: amlogic: meson-gxl-usb3: remove code for non-existing PHY
The registers which are managed by the meson-gxl-usb3 PHY driver are actually "USB control" registers (which are "glue" registers which manage OTG detection and routing of the OTG capable port between the DWC2 peripheral-only controller and the DWC3 host-only controller). Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-g12a-usb driver supports the USB control registers on GXL and GXM SoCs (these were previously managed by the meson-gxl-usb3 PHY driver). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r--Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt31
1 files changed, 0 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt b/Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt
deleted file mode 100644
index 114947e1de3d..000000000000
--- a/Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-* Amlogic Meson GXL and GXM USB3 PHY and OTG detection binding
-
-Required properties:
-- compatible: Should be "amlogic,meson-gxl-usb3-phy"
-- #phys-cells: must be 0 (see phy-bindings.txt in this directory)
-- reg: The base address and length of the registers
-- interrupts: the interrupt specifier for the OTG detection
-- clocks: phandles to the clocks for
- - the USB3 PHY
- - and peripheral mode/OTG detection
-- clock-names: must contain "phy" and "peripheral"
-- resets: phandle to the reset lines for:
- - the USB3 PHY and
- - peripheral mode/OTG detection
-- reset-names: must contain "phy" and "peripheral"
-
-Optional properties:
-- phy-supply: see phy-bindings.txt in this directory
-
-
-Example:
- usb3_phy0: phy@78080 {
- compatible = "amlogic,meson-gxl-usb3-phy";
- #phy-cells = <0>;
- reg = <0x0 0x78080 0x0 0x20>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB_OTG>, <&clkc_AO CLKID_AO_CEC_32K>;
- clock-names = "phy", "peripheral";
- resets = <&reset RESET_USB_OTG>, <&reset RESET_USB_OTG>;
- reset-names = "phy", "peripheral";
- };