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author | Mylène Josserand <mylene.josserand@free-electrons.com> | 2016-09-07 16:53:57 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2016-09-07 21:15:49 +0200 |
commit | ac91ab51e4f882db65449ff821a5664bad4b164c (patch) | |
tree | da6424f4b373588f932921d4879e43c6735867b5 /Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | |
parent | pinctrl: Add pinctrl-aspeed-g5 driver (diff) | |
download | linux-ac91ab51e4f882db65449ff821a5664bad4b164c.tar.xz linux-ac91ab51e4f882db65449ff821a5664bad4b164c.zip |
pinctrl: sunxi: Add GR8 controller support
Just like the other member of the sunxi family, let's add a pinctrl table
for the muxing options.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt')
-rw-r--r-- | Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt index 69617220c5d6..1685821eea41 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt @@ -23,6 +23,7 @@ Required properties: "allwinner,sun8i-h3-pinctrl" "allwinner,sun8i-h3-r-pinctrl" "allwinner,sun50i-a64-pinctrl" + "nextthing,gr8-pinctrl" - reg: Should contain the register physical address and length for the pin controller. |