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| author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2019-06-04 09:19:59 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-06-08 01:29:42 +0200 |
| commit | 53a5372ce326116f3e3d3f1d701113b2542509f4 (patch) | |
| tree | bef02550c74269828e2edfe72546b457bbe28747 /Documentation/devicetree/bindings/pinctrl | |
| parent | pinctrl: Add drive strength support for BM1880 SoC (diff) | |
| download | linux-53a5372ce326116f3e3d3f1d701113b2542509f4.tar.xz linux-53a5372ce326116f3e3d3f1d701113b2542509f4.zip | |
pinctrl: qcom: sdm845: Expose ufs_reset as gpio
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pinr
Reorder the pins and expose it as gpio 150, so that the UFS driver can
toggle it.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt index 321bdb9be0d2..7462e3743c68 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt @@ -79,7 +79,7 @@ to specify in a pin configuration subnode: gpio0-gpio149 Supports mux, bias and drive-strength - sdc2_clk, sdc2_cmd, sdc2_data + sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset Supports bias and drive-strength - function: |