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| author | Yash Shah <yash.shah@sifive.com> | 2020-12-08 05:55:33 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-01-08 02:37:24 +0100 |
| commit | 75e6d7248efccc2b13d0f3811b29d3e5cb04bcad (patch) | |
| tree | de17be73d6d80596bbbfa95cd693d4f77aaf513c /Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | |
| parent | RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 (diff) | |
| download | linux-75e6d7248efccc2b13d0f3811b29d3e5cb04bcad.tar.xz linux-75e6d7248efccc2b13d0f3811b29d3e5cb04bcad.zip | |
dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
cores ("harts") that are present on FU740-C000 SoC.
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm/pwm-sifive.yaml')
0 files changed, 0 insertions, 0 deletions