summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/pwm
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2017-03-01 18:46:02 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2017-03-01 18:46:02 +0100
commit545b2820c4a48245412d97030134cc1d38918726 (patch)
tree78d1b3d0555cd265c3a7830a3dc041b9d1595885 /Documentation/devicetree/bindings/pwm
parentMerge tag 'drm-ast-2500-for-v4.11' of git://people.freedesktop.org/~airlied/l... (diff)
parentMerge branch 'for-4.11/drivers' into for-next (diff)
downloadlinux-545b2820c4a48245412d97030134cc1d38918726.tar.xz
linux-545b2820c4a48245412d97030134cc1d38918726.zip
Merge tag 'pwm/for-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding: "This set contains mostly fixes to existing drivers as well as cleanup of code that's not been in active use for a while" * tag 'pwm/for-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (27 commits) acpi: lpss: call pwm_add_table() for BSW PWM device pwm: Try to load modules during pwm_get() pwm: Don't hold pwm_lookup_lock longer than necessary pwm: Make the PWM_POLARITY flag in DTB optional pwm: Print error messages with pr_err() instead of pr_debug() pwm: imx: Add polarity inversion support to i.MX's PWMv2 pwm: imx: doc: Update imx-pwm.txt documentation entry pwm: imx: Remove redundant i.MX PWMv2 code pwm: imx: Provide atomic PWM support for i.MX PWMv2 pwm: imx: Move PWMv2 wait for fifo slot code to a separate function pwm: imx: Move PWMv2 software reset code to a separate function pwm: imx: Rewrite v1 code to facilitate switch to atomic PWM pwm: imx: Add separate set of PWM ops for v1 and v2 pwm: imx: Remove ipg clock and enable per clock when required pwm: lpss: Add Intel Gemini Lake PCI ID pwm: lpss: Do not export board infos for different PWM types pwm: lpss: Avoid reconfiguring while UPDATE bit is still enabled pwm: lpss: Switch to new atomic API pwm: lpss: Allow duty cycle to be 0 pwm: lpss: Avoid potential overflow of base_unit ...
Diffstat (limited to 'Documentation/devicetree/bindings/pwm')
-rw-r--r--Documentation/devicetree/bindings/pwm/imx-pwm.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
index e00c2e9f484d..c61bdf8cd41b 100644
--- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
@@ -6,8 +6,8 @@ Required properties:
- "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1
- "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27
- reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- the cells format.
+- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.txt
+ in this directory for a description of the cells format.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"
See the clock consumer binding,
@@ -17,7 +17,7 @@ See the clock consumer binding,
Example:
pwm1: pwm@53fb4000 {
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
reg = <0x53fb4000 0x4000>;
clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,