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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-10-05 04:30:57 +0200 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2017-10-05 10:24:14 +0200 |
| commit | 2a158f888853cb11140532be79883c8faf31c83d (patch) | |
| tree | 9b208c46bc17cfd9836a0cf453b95a89d8e3c448 /Documentation/devicetree/bindings/reset | |
| parent | reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC (diff) | |
| download | linux-2a158f888853cb11140532be79883c8faf31c83d.tar.xz linux-2a158f888853cb11140532be79883c8faf31c83d.zip | |
reset: uniphier: add PXs3 reset data
Add basic reset data for Socionext's new SoC PXs3.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'Documentation/devicetree/bindings/reset')
| -rw-r--r-- | Documentation/devicetree/bindings/reset/uniphier-reset.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index 68a6f487c409..93efed629900 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt @@ -13,6 +13,7 @@ Required properties: "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC "socionext,uniphier-ld11-reset" - for LD11 SoC "socionext,uniphier-ld20-reset" - for LD20 SoC + "socionext,uniphier-pxs3-reset" - for PXs3 SoC - #reset-cells: should be 1. Example: @@ -44,6 +45,7 @@ Required properties: "socionext,uniphier-ld11-mio-reset" - for LD11 SoC (MIO) "socionext,uniphier-ld11-sd-reset" - for LD11 SoC (SD) "socionext,uniphier-ld20-sd-reset" - for LD20 SoC + "socionext,uniphier-pxs3-sd-reset" - for PXs3 SoC - #reset-cells: should be 1. Example: @@ -74,6 +76,7 @@ Required properties: "socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC "socionext,uniphier-ld11-peri-reset" - for LD11 SoC "socionext,uniphier-ld20-peri-reset" - for LD20 SoC + "socionext,uniphier-pxs3-peri-reset" - for PXs3 SoC - #reset-cells: should be 1. Example: |