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authorClaire Chang <tientzu@chromium.org>2019-06-19 10:41:10 +0200
committerRob Herring <robh@kernel.org>2019-07-09 22:04:05 +0200
commit1cadfc5877f15a14a77f4161f3ce9f436a39116d (patch)
tree0a7a42b93cf09afa4e701de3de1182ab6f2f2799 /Documentation/devicetree/bindings/serial
parentdt-bindings: arm: Convert RDA Micro board/soc bindings to json-schema (diff)
downloadlinux-1cadfc5877f15a14a77f4161f3ce9f436a39116d.tar.xz
linux-1cadfc5877f15a14a77f4161f3ce9f436a39116d.zip
dt-bindings: serial: add documentation for Rx in-band wakeup support
To support Rx in-band wakeup, one must create an interrupt specifier with edge sensitivity on Rx pin and an addtional pinctrl to reconfigure Rx pin to normal GPIO in sleep state. Driver will switch to sleep mode pinctrl and enable irq wake before suspend and restore to default settings when resuming. Signed-off-by: Claire Chang <tientzu@chromium.org> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r--Documentation/devicetree/bindings/serial/mtk-uart.txt13
1 files changed, 11 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index c6b5262eb352..6fdffb735fb9 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -23,7 +23,12 @@ Required properties:
- reg: The base address of the UART register bank.
-- interrupts: A single interrupt specifier.
+- interrupts:
+ index 0: an interrupt specifier for the UART controller itself
+ index 1: optional, an interrupt specifier with edge sensitivity on Rx pin to
+ support Rx in-band wake up. If one would like to use this feature,
+ one must create an addtional pinctrl to reconfigure Rx pin to normal
+ GPIO before suspend.
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
@@ -39,7 +44,11 @@ Example:
uart0: serial@11006000 {
compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
reg = <0x11006000 0x400>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
clocks = <&uart_clk>, <&bus_clk>;
clock-names = "baud", "bus";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&uart_pin>;
+ pinctrl-1 = <&uart_pin_sleep>;
};