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| author | Hal Feng <hal.feng@starfivetech.com> | 2024-06-04 10:47:27 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-06-24 16:09:10 +0200 |
| commit | ac434f2877b97e18c3df7d9b1e8e2371befd9890 (patch) | |
| tree | f7337921cdac1e8f7517e883d63699c50d9c7f98 /Documentation/devicetree/bindings/serial | |
| parent | Merge tag 'v6.10-rc4' into tty-next (diff) | |
| download | linux-ac434f2877b97e18c3df7d9b1e8e2371befd9890.tar.xz linux-ac434f2877b97e18c3df7d9b1e8e2371befd9890.zip | |
dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC
The UART of StarFive JH7110 has two reset signals.
Both of them are necessary for JH7110 to initialize UART.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240604084729.57239-2-hal.feng@starfivetech.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
| -rw-r--r-- | Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 1001d2a6ace8..4cdb0dcaccf3 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -13,6 +13,20 @@ allOf: - $ref: serial.yaml# - $ref: rs485.yaml# + - if: + properties: + compatible: + contains: + const: starfive,jh7110-uart + then: + properties: + resets: + minItems: 2 + else: + properties: + resets: + maxItems: 1 + properties: compatible: oneOf: @@ -48,6 +62,7 @@ properties: - enum: - starfive,jh7100-hsuart - starfive,jh7100-uart + - starfive,jh7110-uart - const: snps,dw-apb-uart - const: snps,dw-apb-uart @@ -82,7 +97,8 @@ properties: type: boolean resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reg-shift: true |