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authorDilip Kota <dkota@codeaurora.org>2018-10-03 15:44:24 +0200
committerMark Brown <broonie@kernel.org>2018-10-11 16:28:01 +0200
commit4b8ce2f707778f436b8f976cecfdcd984d9d546e (patch)
tree395dd4710e81b597dd973667d8e8f46350fc1dd5 /Documentation/devicetree/bindings/soc
parentdt-bindings: soc: qcom: Remove SPI controller maximum frequency binding (diff)
downloadlinux-4b8ce2f707778f436b8f976cecfdcd984d9d546e.tar.xz
linux-4b8ce2f707778f436b8f976cecfdcd984d9d546e.zip
spi: soc: qcom: GENI SE SPI controller device tree binding
Move GENI SE SPI controller device-tree bindings from devicetree/bindings/soc/qcom/qcom,geni-se.txt to devicetree/bindings/spi/qcom,spi-geni-qcom.txt. Signed-off-by: Dilip Kota <dkota@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/soc')
-rw-r--r--Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt27
1 files changed, 2 insertions, 25 deletions
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
index b9d0c216df8c..dab7ca9f250c 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
@@ -53,19 +53,8 @@ Required properties:
- clocks: Serial engine core clock needed by the device.
Qualcomm Technologies Inc. GENI Serial Engine based SPI Controller
-
-Required properties:
-- compatible: Must contain "qcom,geni-spi".
-- reg: Must contain SPI register location and length.
-- interrupts: Must contain SPI controller interrupts.
-- clock-names: Must contain "se".
-- clocks: Serial engine core clock needed by the device.
-- #address-cells: Must be <1> to define a chip select address on
- the SPI bus.
-- #size-cells: Must be <0>.
-
-SPI slave nodes must be children of the SPI master node and conform to SPI bus
-binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt.
+node binding is described in
+Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt.
Example:
geniqup@8c0000 {
@@ -102,16 +91,4 @@ Example:
pinctrl-1 = <&qup_1_uart_3_sleep>;
};
- spi0: spi@a84000 {
- compatible = "qcom,geni-spi";
- reg = <0xa84000 0x4000>;
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "se";
- clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qup_1_spi_2_active>;
- pinctrl-1 = <&qup_1_spi_2_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
}