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authorClark Wang <xiaoning.wang@nxp.com>2018-12-07 03:50:41 +0100
committerMark Brown <broonie@kernel.org>2018-12-13 12:57:41 +0100
commit62f82df488ce16f7068c7285820b2b7f7dcd7597 (patch)
treeaec0082426fb4b3cb17d3d9a2d582ff1f23f7f68 /Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt
parentspi: lpspi: Let watermark change with send data length (diff)
downloadlinux-62f82df488ce16f7068c7285820b2b7f7dcd7597.tar.xz
linux-62f82df488ce16f7068c7285820b2b7f7dcd7597.zip
doc: lpspi: Document DT bindings for LPSPI slave mode
Add introductions of interrupt-parent and spi-slave. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt')
-rw-r--r--Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt
index 8d178a4503cf..6cc3c6fe25a3 100644
--- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt
@@ -5,8 +5,11 @@ Required properties:
- "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc
- "fsl,imx8qxp-spi" for LPSPI compatible with the one integrated on i.MX8QXP soc
- reg : address and length of the lpspi master registers
+- interrupt-parent : core interrupt controller
- interrupts : lpspi interrupt
- clocks : lpspi clock specifier
+- spi-slave : spi slave mode support. In slave mode, add this attribute without
+ value. In master mode, remove it.
Examples:
@@ -16,4 +19,5 @@ lpspi2: lpspi@40290000 {
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7ULP_CLK_LPSPI2>;
+ spi-slave;
};