diff options
author | Clark Wang <xiaoning.wang@nxp.com> | 2019-03-06 07:30:36 +0100 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2019-03-18 13:16:51 +0100 |
commit | addb32866d99068307f8eddb282ebb325d18446f (patch) | |
tree | 5f50951250f04fc1a6206fd27741b4b7b74157f3 /Documentation/devicetree/bindings/spi | |
parent | spi: lpspi: Add i.MX8 boards support for lpspi (diff) | |
download | linux-addb32866d99068307f8eddb282ebb325d18446f.tar.xz linux-addb32866d99068307f8eddb282ebb325d18446f.zip |
doc: lpspi: Document DT bindings for LPSPI clocks
Add introductions of clocks and clock-names strings.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt index 6cc3c6fe25a3..e71b81a41ac0 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt +++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt @@ -7,7 +7,11 @@ Required properties: - reg : address and length of the lpspi master registers - interrupt-parent : core interrupt controller - interrupts : lpspi interrupt -- clocks : lpspi clock specifier +- clocks : lpspi clock specifier. Its number and order need to correspond to the + value in clock-names. +- clock-names : Corresponding to per clock and ipg clock in "clocks" + respectively. In i.MX7ULP, it only has per clk, so use CLK_DUMMY + to fill the "ipg" blank. - spi-slave : spi slave mode support. In slave mode, add this attribute without value. In master mode, remove it. @@ -18,6 +22,8 @@ lpspi2: lpspi@40290000 { reg = <0x40290000 0x10000>; interrupt-parent = <&intc>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7ULP_CLK_LPSPI2>; + clocks = <&clks IMX7ULP_CLK_LPSPI2>, + <&clks IMX7ULP_CLK_DUMMY>; + clock-names = "per", "ipg"; spi-slave; }; |