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author | Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> | 2019-01-15 13:00:20 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2019-01-28 13:28:12 +0100 |
commit | cdbbb8ec5a8078630b777e0b56e3b39c1e7cd76a (patch) | |
tree | a6f1de4a455fb63ee295355a55cefd16f24b0654 /Documentation/devicetree/bindings/spi | |
parent | spi: spi-mem: Add driver for NXP FlexSPI controller (diff) | |
download | linux-cdbbb8ec5a8078630b777e0b56e3b39c1e7cd76a.tar.xz linux-cdbbb8ec5a8078630b777e0b56e3b39c1e7cd76a.zip |
dt-bindings: spi: add binding file for NXP FlexSPI controller
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt new file mode 100644 index 000000000000..2cd67eb727d4 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt @@ -0,0 +1,39 @@ +* NXP Flex Serial Peripheral Interface (FSPI) + +Required properties: + - compatible : Should be "nxp,lx2160a-fspi" + - reg : First contains the register location and length, + Second contains the memory mapping address and length + - reg-names : Should contain the resource reg names: + - fspi_base: configuration register address space + - fspi_mmap: memory mapped address space + - interrupts : Should contain the interrupt for the device + +Required SPI slave node properties: + - reg : There are two buses (A and B) with two chip selects each. + This encodes to which bus and CS the flash is connected: + - <0>: Bus A, CS 0 + - <1>: Bus A, CS 1 + - <2>: Bus B, CS 0 + - <3>: Bus B, CS 1 + +Example showing the usage of two SPI NOR slave devices on bus A: + +fspi0: spi@20c0000 { + compatible = "nxp,lx2160a-fspi"; + reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + interrupts = <0 25 0x4>; /* Level high type */ + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + + mt35xu512aba0: flash@0 { + reg = <0>; + .... + }; + + mt35xu512aba1: flash@1 { + reg = <1>; + .... + }; +}; |