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authorMatt Redfearn <matt.redfearn@imgtec.com>2015-08-20 12:30:32 +0200
committerLee Jones <lee.jones@linaro.org>2015-08-24 16:28:34 +0200
commit5a688c455066c21c133bc8ffa7b11f8c66b7fe0b (patch)
tree1f6702f5d988d0972381a6c2a110bcebdfb17c4e /Documentation/devicetree/bindings/timer
parentmfd: cros_ec: spi: Add OF match table (diff)
downloadlinux-5a688c455066c21c133bc8ffa7b11f8c66b7fe0b.tar.xz
linux-5a688c455066c21c133bc8ffa7b11f8c66b7fe0b.zip
mfd: jz4740-adc: Init mask cache in generic IRQ chip
The mask cache must be initialised in the generic IRQ chip, otherwise enabling one channel will actually enable all channels when the empty mask cache is written. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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