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authorDaniel Lezcano <daniel.lezcano@linaro.org>2014-09-29 01:59:51 +0200
committerDaniel Lezcano <daniel.lezcano@linaro.org>2014-09-29 01:59:51 +0200
commit867f667fb9c6734e06cc24e96fc7f06a7e772084 (patch)
tree13e3c29b74d986b631f22ca7b3d6020b4aec56a2 /Documentation/devicetree/bindings/timer
parentclocksource: arm_arch_timer: Consolidate arch_timer_evtstrm_enable (diff)
parentclocksource: sh_tmu: Document r8a7779 binding (diff)
downloadlinux-867f667fb9c6734e06cc24e96fc7f06a7e772084.tar.xz
linux-867f667fb9c6734e06cc24e96fc7f06a7e772084.zip
Merge tag 'renesas-clocksource-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into clockevents/3.18
Renesas Clocksource Updates for v3.18 * Document per-SoC bindings Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r--Documentation/devicetree/bindings/timer/renesas,cmt.txt44
-rw-r--r--Documentation/devicetree/bindings/timer/renesas,mtu2.txt7
-rw-r--r--Documentation/devicetree/bindings/timer/renesas,tmu.txt7
3 files changed, 48 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index a17418b0ece3..1a05c1b243c1 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -11,15 +11,47 @@ datasheets.
Required Properties:
- - compatible: must contain one of the following.
- - "renesas,cmt-32" for the 32-bit CMT
+ - compatible: must contain one or more of the following:
+ - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
+ (CMT0)
+ - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
+ (CMT0)
+ - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
+ (CMT0)
+ - "renesas,cmt-32" for all 32-bit CMT without fast clock support
(CMT0 on sh7372, sh73a0 and r8a7740)
- - "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support
+ This is a fallback for the above renesas,cmt-32-* entries.
+
+ - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
+ clock support (CMT[234])
+ - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
+ clock support (CMT[234])
+ - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
+ clock support (CMT[234])
+ - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
(CMT[234] on sh7372, sh73a0 and r8a7740)
- - "renesas,cmt-48" for the 48-bit CMT
+ This is a fallback for the above renesas,cmt-32-fast-* entries.
+
+ - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
+ (CMT1)
+ - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
+ (CMT1)
+ - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
+ (CMT1)
+ - "renesas,cmt-48" for all non-second generation 48-bit CMT
(CMT1 on sh7372, sh73a0 and r8a7740)
- - "renesas,cmt-48-gen2" for the second generation 48-bit CMT
+ This is a fallback for the above renesas,cmt-48-* entries.
+
+ - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT
+ (CMT[01])
+ - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT
+ (CMT[01])
+ - "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT
+ (CMT[01])
+ - "renesas,cmt-48-gen2" for all second generation 48-bit CMT
(CMT[01] on r8a73a4, r8a7790 and r8a7791)
+ This is a fallback for the renesas,cmt-48-r8a73a4,
+ renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
- reg: base address and length of the registers block for the timer module.
- interrupts: interrupt-specifier for the timer, one per channel.
@@ -36,7 +68,7 @@ Example: R8A7790 (R-Car H2) CMT0 node
them channels 0 and 1 in the documentation.
cmt0: timer@ffca0000 {
- compatible = "renesas,cmt-48-gen2";
+ compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
<0 142 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/Documentation/devicetree/bindings/timer/renesas,mtu2.txt b/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
index 917453f826bc..d9a8d5af1a21 100644
--- a/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
@@ -8,7 +8,10 @@ are independent. The MTU2 hardware supports five channels indexed from 0 to 4.
Required Properties:
- - compatible: must contain "renesas,mtu2"
+ - compatible: must be one or more of the following:
+ - "renesas,mtu2-r7s72100" for the r7s72100 MTU2
+ - "renesas,mtu2" for any MTU2
+ This is a fallback for the above renesas,mtu2-* entries
- reg: base address and length of the registers block for the timer module.
@@ -26,7 +29,7 @@ Required Properties:
Example: R7S72100 (RZ/A1H) MTU2 node
mtu2: timer@fcff0000 {
- compatible = "renesas,mtu2";
+ compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
reg = <0xfcff0000 0x400>;
interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,
<0 146 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.txt b/Documentation/devicetree/bindings/timer/renesas,tmu.txt
index 425d0c5f4aee..7db89fb25444 100644
--- a/Documentation/devicetree/bindings/timer/renesas,tmu.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,tmu.txt
@@ -8,7 +8,10 @@ are independent. The TMU hardware supports up to three channels.
Required Properties:
- - compatible: must contain "renesas,tmu"
+ - compatible: must contain one or more of the following:
+ - "renesas,tmu-r8a7779" for the r8a7779 TMU
+ - "renesas,tmu" for any TMU.
+ This is a fallback for the above renesas,tmu-* entries
- reg: base address and length of the registers block for the timer module.
@@ -27,7 +30,7 @@ Optional Properties:
Example: R8A7779 (R-Car H1) TMU0 node
tmu0: timer@ffd80000 {
- compatible = "renesas,tmu";
+ compatible = "renesas,tmu-r8a7779", "renesas,tmu";
reg = <0xffd80000 0x30>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
<0 33 IRQ_TYPE_LEVEL_HIGH>,