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| author | Stephen Warren <swarren@nvidia.com> | 2013-11-06 22:00:25 +0100 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-12-12 00:41:55 +0100 |
| commit | d8f64797c5ff3351a54830bba2cbc7e0b00e4613 (patch) | |
| tree | 6df5a7b5c0fe9effa08aef6df00d8d8dc6b08014 /Documentation/devicetree/bindings/timer | |
| parent | Merge tag 'clk-tegra-for-3.14' into for-3.14/dmas-resets-rework (diff) | |
| download | linux-d8f64797c5ff3351a54830bba2cbc7e0b00e4613.tar.xz linux-d8f64797c5ff3351a54830bba2cbc7e0b00e4613.zip | |
ARM: tegra: add missing clock documentation to DT bindings
Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.
All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
| -rw-r--r-- | Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt | 3 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt index e019fdc38773..4a864bd10d3d 100644 --- a/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt @@ -8,6 +8,8 @@ Required properties: - compatible : should be "nvidia,tegra20-timer". - reg : Specifies base physical address and size of the registers. - interrupts : A list of 4 interrupts; one per timer channel. +- clocks : Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. Example: @@ -18,4 +20,5 @@ timer { 0 1 0x04 0 41 0x04 0 42 0x04>; + clocks = <&tegra_car 132>; }; diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt index 906109d4c593..b5082a1cf461 100644 --- a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt @@ -10,6 +10,8 @@ Required properties: - reg : Specifies base physical address and size of the registers. - interrupts : A list of 6 interrupts; one per each of timer channels 1 through 5, and one for the shared interrupt for the remaining channels. +- clocks : Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. timer { compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer"; @@ -20,4 +22,5 @@ timer { 0 42 0x04 0 121 0x04 0 122 0x04>; + clocks = <&tegra_car 214>; }; |