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authorJamie Iles <jamie@jamieiles.com>2011-06-27 14:32:33 +0200
committerGrant Likely <grant.likely@secretlab.ca>2011-06-27 21:30:59 +0200
commit61ab1a90d81b5b8a53fc221a3665715c61614fb7 (patch)
tree34041ae7560d087cc7b239488438e0edfb41e2af /Documentation/devicetree/bindings/tty
parentdt/platform: allow device name to be overridden (diff)
downloadlinux-61ab1a90d81b5b8a53fc221a3665715c61614fb7.tar.xz
linux-61ab1a90d81b5b8a53fc221a3665715c61614fb7.zip
dt: document the of_serial bindings
The of_serial bindings can be used to register a number of serial devices. Document this binding with all of the others. v3: remove device-type and clarify used-by-rtas Signed-off-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'Documentation/devicetree/bindings/tty')
-rw-r--r--Documentation/devicetree/bindings/tty/serial/of-serial.txt33
1 files changed, 33 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
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index 000000000000..35e53ae85eec
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+++ b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
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+* UART (Universal Asynchronous Receiver/Transmitter)
+
+Required properties:
+- compatible : one of:
+ - "ns8250"
+ - "ns16450"
+ - "ns16550a"
+ - "ns16550"
+ - "ns16750"
+ - "ns16850"
+ - "nvidia,tegra250-uart"
+ - "ibm,qpace-nwp-serial"
+ - "serial" if the port type is unknown.
+- reg : offset and length of the register set for the device.
+- interrupts : should contain uart interrupt.
+- clock-frequency : the input clock frequency for the UART.
+
+Optional properties:
+- current-speed : the current active speed of the UART.
+- reg-offset : offset to apply to the mapbase from the start of the registers.
+- reg-shift : quantity to shift the register offsets by.
+- used-by-rtas : set to indicate that the port is in use by the OpenFirmware
+ RTAS and should not be registered.
+
+Example:
+
+ uart@80230000 {
+ compatible = "ns8250";
+ reg = <0x80230000 0x100>;
+ clock-frequency = <3686400>;
+ interrupts = <10>;
+ reg-shift = <2>;
+ };