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author | William Wu <william.wu@rock-chips.com> | 2016-08-16 16:44:37 +0200 |
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committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2016-08-25 11:13:11 +0200 |
commit | 16199f33893922db8de8d3460384291b853051ec (patch) | |
tree | 0ce2e3f2845128123b675df47ed56b723925fcd8 /Documentation/devicetree/bindings/usb/dwc3.txt | |
parent | usb: gadget: net2280: match interrupt endpoints to PIO endpoints and DMA to bulk (diff) | |
download | linux-16199f33893922db8de8d3460384291b853051ec.tar.xz linux-16199f33893922db8de8d3460384291b853051ec.zip |
usb: dwc3: add dis_u2_freeclk_exists_quirk
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/usb/dwc3.txt')
-rw-r--r-- | Documentation/devicetree/bindings/usb/dwc3.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 7d7ce089b003..020b0e935fd3 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -39,6 +39,9 @@ Optional properties: disabling the suspend signal to the PHY. - snps,dis_rxdet_inp3_quirk: when set core will disable receiver detection in PHY P3 power state. + - snps,dis-u2-freeclk-exists-quirk: when set, clear the u2_freeclk_exists + in GUSB2PHYCFG, specify that USB2 PHY doesn't provide + a free-running PHY clock. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal utmi_l1_suspend_n, false when asserts utmi_sleep_n - snps,hird-threshold: HIRD threshold |