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authorRoland Stigge <stigge@antcom.de>2012-04-20 15:34:09 +0200
committerWolfram Sang <w.sang@pengutronix.de>2012-05-12 14:28:14 +0200
commita092de11bb4a96ac43ede0352e09bdf7e06280e8 (patch)
treed00b69bb5214e6287005c28c5f9f7df51e8a0d3b /Documentation/devicetree
parenti2c: imx: don't use strcpy but strlcpy (diff)
downloadlinux-a092de11bb4a96ac43ede0352e09bdf7e06280e8.tar.xz
linux-a092de11bb4a96ac43ede0352e09bdf7e06280e8.zip
i2c: pnx: add device tree support
This patch adds device tree support to the pnx-i2c driver by using platform resources for memory region and irq and removing dependency on mach includes. The following platforms are affected: * PNX * LPC31xx (WIP) * LPC32xx The patch is based on a patch by Jon Smirl, working on lpc31xx integration Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/i2c/pnx.txt36
1 files changed, 36 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/pnx.txt b/Documentation/devicetree/bindings/i2c/pnx.txt
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+* NXP PNX I2C Controller
+
+Required properties:
+
+ - reg: Offset and length of the register set for the device
+ - compatible: should be "nxp,pnx-i2c"
+ - interrupts: configure one interrupt line
+ - #address-cells: always 1 (for i2c addresses)
+ - #size-cells: always 0
+ - interrupt-parent: the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Optional properties:
+
+ - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz
+
+Examples:
+
+ i2c1: i2c@400a0000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400a0000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <51 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@400a8000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400a8000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <50 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ };