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author | Y Vo <yvo@apm.com> | 2015-01-16 08:34:20 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2015-01-20 10:39:25 +0100 |
commit | 7a839e9a277d4a410a9b015d561ff09739bc0ff6 (patch) | |
tree | 760f11aebd5cf04fec879ba6cae7469cc3fb5da0 /Documentation/devicetree | |
parent | gpio: Add APM X-Gene standby GPIO controller driver (diff) | |
download | linux-7a839e9a277d4a410a9b015d561ff09739bc0ff6.tar.xz linux-7a839e9a277d4a410a9b015d561ff09739bc0ff6.zip |
Documentation: gpio: Add APM X-Gene standby GPIO controller DTS binding
Documentation for APM X-Gene standby GPIO controller DTS binding.
Signed-off-by: Y Vo <yvo@apm.com>
[Some spelling and various fixes]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt new file mode 100644 index 000000000000..dae130060537 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt @@ -0,0 +1,32 @@ +APM X-Gene Standby GPIO controller bindings + +This is a gpio controller in the standby domain. + +There are 20 GPIO pins from 0..21. There is no GPIO_DS14 or GPIO_DS15, +only GPIO_DS8..GPIO_DS13 support interrupts. The IRQ mapping +is currently 1-to-1 on interrupts 0x28 thru 0x2d. + +Required properties: +- compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller +- reg: Physical base address and size of the controller's registers +- #gpio-cells: Should be two. + - first cell is the pin number + - second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low +- gpio-controller: Marks the device node as a GPIO controller. +- interrupts: Shall contain exactly 6 interrupts. + +Example: + sbgpio: sbgpio@17001000 { + compatible = "apm,xgene-gpio-sb"; + reg = <0x0 0x17001000 0x0 0x400>; + #gpio-cells = <2>; + gpio-controller; + interrupts = <0x0 0x28 0x1>, + <0x0 0x29 0x1>, + <0x0 0x2a 0x1>, + <0x0 0x2b 0x1>, + <0x0 0x2c 0x1>, + <0x0 0x2d 0x1>; + }; |