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author | Mugunthan V N <mugunthanvnm@ti.com> | 2014-05-09 15:37:34 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2014-05-13 06:11:00 +0200 |
commit | d415fa1b88748d664b7b6a310dd8e699d2686cf7 (patch) | |
tree | 844c74e292d493f3caf2298efc8b620c1eb556e3 /Documentation/devicetree | |
parent | drivers: net: cpsw-phy-sel: initialize priv->dev (diff) | |
download | linux-d415fa1b88748d664b7b6a310dd8e699d2686cf7.tar.xz linux-d415fa1b88748d664b7b6a310dd8e699d2686cf7.zip |
drivers: net: cpsw-phy-sel: add dra7xx support for phy sel
Add dra7xx support for selecting the phy mode which is present in control
module of dra7xx SoC
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/net/cpsw-phy-sel.txt | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/net/cpsw-phy-sel.txt b/Documentation/devicetree/bindings/net/cpsw-phy-sel.txt index 7ff57a119f81..d9da911b6eea 100644 --- a/Documentation/devicetree/bindings/net/cpsw-phy-sel.txt +++ b/Documentation/devicetree/bindings/net/cpsw-phy-sel.txt @@ -2,7 +2,8 @@ TI CPSW Phy mode Selection Device Tree Bindings ----------------------------------------------- Required properties: -- compatible : Should be "ti,am3352-cpsw-phy-sel" +- compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and + "ti,dra7xx-cpsw-phy-sel" for dra7xx platform - reg : physical base address and size of the cpsw registers map - reg-names : names of the register map given in "reg" node |