diff options
author | Roger Quadros <rogerq@ti.com> | 2013-03-12 12:24:25 +0100 |
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committer | Felipe Balbi <balbi@ti.com> | 2013-03-18 10:15:12 +0100 |
commit | 0eba387973f521e57f00584e5e840e5328a61dda (patch) | |
tree | ea216d8038e2982dd79c8cc3b34cf9db116ed129 /Documentation/devicetree | |
parent | usb: phy: nop: use new PHY API to register PHY (diff) | |
download | linux-0eba387973f521e57f00584e5e840e5328a61dda.tar.xz linux-0eba387973f521e57f00584e5e840e5328a61dda.zip |
usb: phy: nop: Add device tree support and binding information
The PHY clock, clock rate, VCC regulator and RESET regulator
can now be provided via device tree.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt new file mode 100644 index 000000000000..d7e272671c7e --- /dev/null +++ b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt @@ -0,0 +1,34 @@ +USB NOP PHY + +Required properties: +- compatible: should be usb-nop-xceiv + +Optional properties: +- clocks: phandle to the PHY clock. Use as per Documentation/devicetree + /bindings/clock/clock-bindings.txt + This property is required if clock-frequency is specified. + +- clock-names: Should be "main_clk" + +- clock-frequency: the clock frequency (in Hz) that the PHY clock must + be configured to. + +- vcc-supply: phandle to the regulator that provides RESET to the PHY. + +- reset-supply: phandle to the regulator that provides power to the PHY. + +Example: + + hsusb1_phy { + compatible = "usb-nop-xceiv"; + clock-frequency = <19200000>; + clocks = <&osc 0>; + clock-names = "main_clk"; + vcc-supply = <&hsusb1_vcc_regulator>; + reset-supply = <&hsusb1_reset_regulator>; + }; + +hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator +and expects that clock to be configured to 19.2MHz by the NOP PHY driver. +hsusb1_vcc_regulator provides power to the PHY and hsusb1_reset_regulator +controls RESET. |