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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2018-11-04 00:10:23 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2018-11-11 16:29:49 +0100
commit27be1f6408baa0ac629f3273433f61051357a60a (patch)
tree9cf3b4541b87ac411cce952031eed33e96de40f4 /Documentation/devicetree
parentstaging:iio:ad2s90: Check channel type at read_raw (diff)
downloadlinux-27be1f6408baa0ac629f3273433f61051357a60a.tar.xz
linux-27be1f6408baa0ac629f3273433f61051357a60a.zip
dt-bindings: iio: adc: meson-saradc: add temperature sensor support
The 32-bit Meson8 SoC can use the SAR ADC to read the chip temperature. This requires setting the correct TSC (temperature sensor coefficient), which is programmed into the eFuse during the manufacturing process. Meson8b and Meson8m2 are not supported yet because they have a 5-bit TSC and only the first four bits are stored inside the SAR ADC registers. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
index 54b823f3a453..325090e43ce6 100644
--- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
@@ -22,6 +22,12 @@ Required properties:
- vref-supply: the regulator supply for the ADC reference voltage
- #io-channel-cells: must be 1, see ../iio-bindings.txt
+Optional properties:
+- nvmem-cells: phandle to the temperature_calib eFuse cells
+- nvmem-cell-names: if present (to enable the temperature sensor
+ calibration) this must contain "temperature_calib"
+
+
Example:
saradc: adc@8680 {
compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";