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authorIvan Bornyakov <i.bornyakov@metrotek.ru>2022-06-23 18:32:45 +0200
committerXu Yilun <yilun.xu@intel.com>2022-06-24 06:12:24 +0200
commit288cc44b27077a941101ac7c1b683b0c90c1a214 (patch)
tree681869d9dabf703d377da106f2aa70a304f24a6e /Documentation/driver-api/fpga
parentfpga: fpga-mgr: support bitstream offset in image buffer (diff)
downloadlinux-288cc44b27077a941101ac7c1b683b0c90c1a214.tar.xz
linux-288cc44b27077a941101ac7c1b683b0c90c1a214.zip
docs: fpga: mgr: document parse_header() callback
Document newly introduced fpga_manager_ops callback parse_header() and flag skip_header along with header_size and data_size fields of struct fpga_image_info. Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru> Acked-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20220623163248.3672-3-i.bornyakov@metrotek.ru Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Diffstat (limited to 'Documentation/driver-api/fpga')
-rw-r--r--Documentation/driver-api/fpga/fpga-mgr.rst27
1 files changed, 21 insertions, 6 deletions
diff --git a/Documentation/driver-api/fpga/fpga-mgr.rst b/Documentation/driver-api/fpga/fpga-mgr.rst
index 42c01f396dce..49c0a9512653 100644
--- a/Documentation/driver-api/fpga/fpga-mgr.rst
+++ b/Documentation/driver-api/fpga/fpga-mgr.rst
@@ -79,12 +79,27 @@ do the programming sequence for this particular FPGA. These ops return 0 for
success or negative error codes otherwise.
The programming sequence is::
- 1. .write_init
- 2. .write or .write_sg (may be called once or multiple times)
- 3. .write_complete
-
-The .write_init function will prepare the FPGA to receive the image data. The
-buffer passed into .write_init will be at most .initial_header_size bytes long;
+ 1. .parse_header (optional, may be called once or multiple times)
+ 2. .write_init
+ 3. .write or .write_sg (may be called once or multiple times)
+ 4. .write_complete
+
+The .parse_header function will set header_size and data_size to
+struct fpga_image_info. Before parse_header call, header_size is initialized
+with initial_header_size. If flag skip_header of fpga_manager_ops is true,
+.write function will get image buffer starting at header_size offset from the
+beginning. If data_size is set, .write function will get data_size bytes of
+the image buffer, otherwise .write will get data up to the end of image buffer.
+This will not affect .write_sg, .write_sg will still get whole image in
+sg_table form. If FPGA image is already mapped as a single contiguous buffer,
+whole buffer will be passed into .parse_header. If image is in scatter-gather
+form, core code will buffer up at least .initial_header_size before the first
+call of .parse_header, if it is not enough, .parse_header should set desired
+size into info->header_size and return -EAGAIN, then it will be called again
+with greater part of image buffer on the input.
+
+The .write_init function will prepare the FPGA to receive the image data. The
+buffer passed into .write_init will be at least info->header_size bytes long;
if the whole bitstream is not immediately available then the core code will
buffer up at least this much before starting.