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authorRahul Rameshbabu <rrameshbabu@nvidia.com>2023-06-12 23:14:52 +0200
committerDavid S. Miller <davem@davemloft.net>2023-06-20 10:02:32 +0200
commita05d070a6164bd0578991e42181a52b9c7cf630c (patch)
treec3e112933bbe87f5531c390b6555595715bcc37e /Documentation/driver-api
parentMerge branch 'ipv6-random-cleanup-for-extension-header' (diff)
downloadlinux-a05d070a6164bd0578991e42181a52b9c7cf630c.tar.xz
linux-a05d070a6164bd0578991e42181a52b9c7cf630c.zip
ptp: Clarify ptp_clock_info .adjphase expects an internal servo to be used
.adjphase expects a PHC to use an internal servo algorithm to correct the provided phase offset target in the callback. Implementation of the internal servo algorithm are defined by the individual devices. Cc: Jakub Kicinski <kuba@kernel.org> Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/driver-api')
-rw-r--r--Documentation/driver-api/ptp.rst16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/driver-api/ptp.rst b/Documentation/driver-api/ptp.rst
index 664838ae7776..4552a1f20488 100644
--- a/Documentation/driver-api/ptp.rst
+++ b/Documentation/driver-api/ptp.rst
@@ -73,6 +73,22 @@ Writing clock drivers
class driver, since the lock may also be needed by the clock
driver's interrupt service routine.
+PTP hardware clock requirements for '.adjphase'
+-----------------------------------------------
+
+ The 'struct ptp_clock_info' interface has a '.adjphase' function.
+ This function has a set of requirements from the PHC in order to be
+ implemented.
+
+ * The PHC implements a servo algorithm internally that is used to
+ correct the offset passed in the '.adjphase' call.
+ * When other PTP adjustment functions are called, the PHC servo
+ algorithm is disabled.
+
+ **NOTE:** '.adjphase' is not a simple time adjustment functionality
+ that 'jumps' the PHC clock time based on the provided offset. It
+ should correct the offset provided using an internal algorithm.
+
Supported hardware
==================