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| author | Jisheng Zhang <jszhang@marvell.com> | 2016-01-20 12:27:24 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-01-21 21:04:59 +0100 |
| commit | 15cc4a4a99ebfbbb696e85dca30680b522811a44 (patch) | |
| tree | 5b76dfbc514214a783ebd1ce36dcd716c0299412 /Documentation/hwmon/max16065 | |
| parent | net: mvneta: Try to get named core clock first (diff) | |
| download | linux-15cc4a4a99ebfbbb696e85dca30680b522811a44.tar.xz linux-15cc4a4a99ebfbbb696e85dca30680b522811a44.zip | |
net: mvneta: get optional bus clk
Some platforms may provide more than one clk for the mvneta IP, for
example Marvell BG4CT provides one clk for the mac core, and one
clk for the AXI bus logic. Obviously this bus clk also need to
be enabled. This patch adds this optional "bus" clk support.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/hwmon/max16065')
0 files changed, 0 insertions, 0 deletions