summaryrefslogtreecommitdiffstats
path: root/Documentation/hwmon/powr1220.rst
diff options
context:
space:
mode:
authorMauro Carvalho Chehab <mchehab+samsung@kernel.org>2019-04-17 11:46:29 +0200
committerGuenter Roeck <linux@roeck-us.net>2019-04-17 19:37:23 +0200
commit7ebd8b66dd9e5a0b65e5ee5e2b8e7ca382ec97b7 (patch)
tree9db30159bd32bec125c7d49e80a79bb7c4da0c8e /Documentation/hwmon/powr1220.rst
parentdocs: hwmon: convert remaining files to ReST format (diff)
downloadlinux-7ebd8b66dd9e5a0b65e5ee5e2b8e7ca382ec97b7.tar.xz
linux-7ebd8b66dd9e5a0b65e5ee5e2b8e7ca382ec97b7.zip
docs: hwmon: Add an index file and rename docs to *.rst
Now that all files were converted to ReST format, rename them and add an index. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'Documentation/hwmon/powr1220.rst')
-rw-r--r--Documentation/hwmon/powr1220.rst53
1 files changed, 53 insertions, 0 deletions
diff --git a/Documentation/hwmon/powr1220.rst b/Documentation/hwmon/powr1220.rst
new file mode 100644
index 000000000000..a7fc258da0a8
--- /dev/null
+++ b/Documentation/hwmon/powr1220.rst
@@ -0,0 +1,53 @@
+Kernel driver powr1220
+======================
+
+Supported chips:
+
+ * Lattice POWR1220AT8
+
+ Prefix: 'powr1220'
+
+ Addresses scanned: none
+
+ Datasheet: Publicly available at the Lattice website
+
+ http://www.latticesemi.com/
+
+Author: Scott Kanowitz <scott.kanowitz@gmail.com>
+
+Description
+-----------
+
+This driver supports the Lattice POWR1220AT8 chip. The POWR1220
+includes voltage monitoring for 14 inputs as well as trim settings
+for output voltages and GPIOs. This driver implements the voltage
+monitoring portion of the chip.
+
+Voltages are sampled by a 12-bit ADC with a step size of 2 mV.
+An in-line attenuator allows measurements from 0 to 6 V. The
+attenuator is enabled or disabled depending on the setting of the
+input's max value. The driver will enable the attenuator for any
+value over the low measurement range maximum of 2 V.
+
+The input naming convention is as follows:
+
+============== ========
+driver name pin name
+============== ========
+in0 VMON1
+in1 VMON2
+in2 VMON3
+in2 VMON4
+in4 VMON5
+in5 VMON6
+in6 VMON7
+in7 VMON8
+in8 VMON9
+in9 VMON10
+in10 VMON11
+in11 VMON12
+in12 VCCA
+in13 VCCINP
+============== ========
+
+The ADC readings are updated on request with a minimum period of 1s.