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authorPaul Walmsley <paul.walmsley@sifive.com>2019-05-20 18:19:40 +0200
committerPaul Walmsley <paul.walmsley@sifive.com>2019-06-17 11:03:58 +0200
commit4fd669a8c4873b6ad54e77bc45aa37b03edc5587 (patch)
treea346612019b7b2551e7aadd3d20b01dec1e71b71 /Documentation/hwmon/via686a.rst
parentdt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 (diff)
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dt-bindings: riscv: convert cpu binding to json-schema
At Rob's request, we're starting to migrate our DT binding documentation to json-schema YAML format. Start by converting our cpu binding documentation. While doing so, document more properties and nodes. This includes adding binding documentation support for the E51 and U54 CPU cores ("harts") that are present on this SoC. These cores are described in: https://static.dev.sifive.com/FU540-C000-v1.0.pdf This cpus.yaml file is intended to be a starting point and to evolve over time. It passes dt-doc-validate as of the yaml-bindings commit 4c79d42e9216. This patch was originally based on the ARM json-schema binding documentation as added by commit 672951cbd1b7 ("dt-bindings: arm: Convert cpu binding to json-schema"). Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Rob Herring <robh@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-riscv@lists.infradead.org
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