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| author | Joel Stanley <joel@jms.id.au> | 2018-02-20 02:43:29 +0100 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2018-02-20 17:42:29 +0100 |
| commit | 1d7592f84f92c6344978186fdbe547af044274b5 (patch) | |
| tree | c185c0f0b87fbe999c5bd9ccf52c28450a3bd3bb /Documentation/hwmon/w83l785ts | |
| parent | dt-bindings: aspeed-lpc: Add reset controller (diff) | |
| download | linux-1d7592f84f92c6344978186fdbe547af044274b5.tar.xz linux-1d7592f84f92c6344978186fdbe547af044274b5.zip | |
reset: simple: Enable for ASPEED systems
ASPEED BMC SoCs have a reset controller in the LPC IP that can be
controlled using this driver to release the UARTs from reset.
No special configuration is required, so only the compatible string is
added.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'Documentation/hwmon/w83l785ts')
0 files changed, 0 insertions, 0 deletions