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| author | Alex Qiu <xqiu@google.com> | 2020-05-05 02:59:45 +0200 |
|---|---|---|
| committer | Guenter Roeck <linux@roeck-us.net> | 2020-05-22 15:28:38 +0200 |
| commit | 5a56a39be7ffb416dd5ec5e1489d5a3a8b6a63f2 (patch) | |
| tree | d74d6ecfcaf4de7ce79819e1052aa75891ef3350 /Documentation/hwmon | |
| parent | hwmon: (lm70) Add support for ACPI (diff) | |
| download | linux-5a56a39be7ffb416dd5ec5e1489d5a3a8b6a63f2.tar.xz linux-5a56a39be7ffb416dd5ec5e1489d5a3a8b6a63f2.zip | |
hwmon: (ina2xx) Implement alert functions
Implement alert functions for INA226, INA230 and INA231. Expose 06h
Mask/Enable and 07h Alert Limit registers via alert setting and alarm
files.
Signed-off-by: Alex Qiu <xqiu@google.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'Documentation/hwmon')
| -rw-r--r-- | Documentation/hwmon/ina2xx.rst | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/Documentation/hwmon/ina2xx.rst b/Documentation/hwmon/ina2xx.rst index 94b9a260c518..ed81f5416331 100644 --- a/Documentation/hwmon/ina2xx.rst +++ b/Documentation/hwmon/ina2xx.rst @@ -99,6 +99,25 @@ Sysfs entries for ina226, ina230 and ina231 only ------------------------------------------------ ======================= ==================================================== +in0_lcrit Critical low shunt voltage +in0_crit Critical high shunt voltage +in0_lcrit_alarm Shunt voltage critical low alarm +in0_crit_alarm Shunt voltage critical high alarm +in1_lcrit Critical low bus voltage +in1_crit Critical high bus voltage +in1_lcrit_alarm Bus voltage critical low alarm +in1_crit_alarm Bus voltage critical high alarm +power1_crit Critical high power +power1_crit_alarm Power critical high alarm update_interval data conversion time; affects number of samples used to average results for shunt and bus voltages. ======================= ==================================================== + +.. note:: + + - Configure `shunt_resistor` before configure `power1_crit`, because power + value is calculated based on `shunt_resistor` set. + - Because of the underlying register implementation, only one `*crit` setting + and its `alarm` can be active. Writing to one `*crit` setting clears other + `*crit` settings and alarms. Writing 0 to any `*crit` setting clears all + `*crit` settings and alarms. |