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author | Jarkko Nikula <jarkko.nikula@linux.intel.com> | 2019-07-01 15:15:34 +0200 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2019-07-05 20:59:10 +0200 |
commit | 051d769f0a36b4642897d909cef980f944ae20ab (patch) | |
tree | 8454ab56169a191adfc39ed6b4c4ba4676f4905e /Documentation/i2c/busses | |
parent | i2c: i801: Fix PCI ID sorting (diff) | |
download | linux-051d769f0a36b4642897d909cef980f944ae20ab.tar.xz linux-051d769f0a36b4642897d909cef980f944ae20ab.zip |
i2c: i801: Add support for Intel Tiger Lake
Add SMBUS PCI ID for Intel Tiger Lake -LP.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation/i2c/busses')
-rw-r--r-- | Documentation/i2c/busses/i2c-i801 | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index d247edcb0f99..04b5de80ce4e 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -38,6 +38,7 @@ Supported adapters: * Intel Ice Lake (PCH) * Intel Comet Lake (PCH) * Intel Elkhart Lake (PCH) + * Intel Tiger Lake (PCH) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller |