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| author | Vincenzo Frascino <vincenzo.frascino@arm.com> | 2019-09-16 12:51:17 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2020-09-04 13:46:06 +0200 |
| commit | 637ec831ea4f09c7529ac4078399ce4e25b46341 (patch) | |
| tree | 7f8a21f46e15ffc6958c46a202ab8d578b23fb9c /Documentation/input/input-programming.rst | |
| parent | arm64: mte: Add specific SIGSEGV codes (diff) | |
| download | linux-637ec831ea4f09c7529ac4078399ce4e25b46341.tar.xz linux-637ec831ea4f09c7529ac4078399ce4e25b46341.zip | |
arm64: mte: Handle synchronous and asynchronous tag check faults
The Memory Tagging Extension has two modes of notifying a tag check
fault at EL0, configurable through the SCTLR_EL1.TCF0 field:
1. Synchronous raising of a Data Abort exception with DFSC 17.
2. Asynchronous setting of a cumulative bit in TFSRE0_EL1.
Add the exception handler for the synchronous exception and handling of
the asynchronous TFSRE0_EL1.TF0 bit setting via a new TIF flag in
do_notify_resume().
On a tag check failure in user-space, whether synchronous or
asynchronous, a SIGSEGV will be raised on the faulting thread.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/input/input-programming.rst')
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