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author | Scott Wood <scottwood@freescale.com> | 2009-11-13 21:13:01 +0100 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-11-30 10:53:49 +0100 |
commit | 476459a6cf46d20ec73d9b211f3894ced5f9871e (patch) | |
tree | 38825d12755f3ff540b15a8f42ebeb6bab6d10f1 /Documentation/kernel-doc-nano-HOWTO.txt | |
parent | mtd: eLBC NAND: increase bus timeout to maximum (diff) | |
download | linux-476459a6cf46d20ec73d9b211f3894ced5f9871e.tar.xz linux-476459a6cf46d20ec73d9b211f3894ced5f9871e.zip |
mtd: eLBC NAND: use recommended command sequences
Currently, the program and erase sequences do not wait for completion,
instead relying on a subsequent waitfunc() callback. However, this causes
the chipselect to be deasserted while the NAND chip is still asserting the
busy pin, which can corrupt activity on other chipselects.
This patch switches to using the sequences recommended by the manual,
in which a wait is performed within the initial command sequence. We can
now re-use the status byte from the initial command sequence, rather than
having to do another status read in the waitfunc.
Since we're already touching the command sequences, it also cleans up some
cruft in SEQIN that isn't needed since we cannot program partial pages
outside of OOB.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reported-by: Suchit Lepcha <suchit.lepcha@freescale.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'Documentation/kernel-doc-nano-HOWTO.txt')
0 files changed, 0 insertions, 0 deletions