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authorDavid Daney <ddaney@caviumnetworks.com>2010-10-08 01:03:42 +0200
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 20:08:35 +0200
commitb8db85b5b5c22236d168eb03a67c2641bf7fa651 (patch)
treea372c5f0db85255ce60f2670a1211f205239d045 /Documentation/lockstat.txt
parentMIPS: Octeon: Add cn63XX to Octeon chip detection macros. (diff)
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MIPS: Octeon: Update L2 Cache code for CN63XX
The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this. Some joining of split lines was also done to improve readability, as well as reformatting of comments. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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