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authorIngo Molnar <mingo@elte.hu>2009-04-08 17:25:42 +0200
committerIngo Molnar <mingo@elte.hu>2009-04-08 17:26:00 +0200
commit5af8c4e0fac9838428bd718040b664043a05f37c (patch)
tree75a01d98ed244db45fe3c734c4a81c1a3d92ac37 /Documentation/powerpc/dts-bindings/fsl/esdhc.txt
parentsched: Print sched_group::__cpu_power in sched_domain_debug (diff)
parentLinux 2.6.30-rc1 (diff)
downloadlinux-5af8c4e0fac9838428bd718040b664043a05f37c.tar.xz
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Merge commit 'v2.6.30-rc1' into sched/urgent
Merge reason: update to latest upstream to queue up fix Signed-off-by: Ingo Molnar <mingo@elte.hu>
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+* Freescale Enhanced Secure Digital Host Controller (eSDHC)
+
+The Enhanced Secure Digital Host Controller provides an interface
+for MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+ - compatible : should be
+ "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
+ "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
+ - reg : should contain eSDHC registers location and length.
+ - interrupts : should contain eSDHC interrupt.
+ - interrupt-parent : interrupt source phandle.
+ - clock-frequency : specifies eSDHC base clock frequency.
+
+Example:
+
+sdhci@2e000 {
+ compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
+};