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author | Ingo Molnar <mingo@elte.hu> | 2008-07-18 21:13:20 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-18 21:13:20 +0200 |
commit | f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c (patch) | |
tree | c5643fcdc884a8d0bfc3f1bc28039cab7394e5bc /Documentation/powerpc/dts-bindings/fsl/gtm.txt | |
parent | x86: use generic per-device dma coherent allocator (diff) | |
parent | Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff) | |
download | linux-f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c.tar.xz linux-f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c.zip |
Merge branch 'linus' into core/generic-dma-coherent
Conflicts:
kernel/Makefile
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'Documentation/powerpc/dts-bindings/fsl/gtm.txt')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/gtm.txt | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/gtm.txt b/Documentation/powerpc/dts-bindings/fsl/gtm.txt new file mode 100644 index 000000000000..9a33efded4bc --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/gtm.txt @@ -0,0 +1,31 @@ +* Freescale General-purpose Timers Module + +Required properties: + - compatible : should be + "fsl,<chip>-gtm", "fsl,gtm" for SOC GTMs + "fsl,<chip>-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs + "fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs + - reg : should contain gtm registers location and length (0x40). + - interrupts : should contain four interrupts. + - interrupt-parent : interrupt source phandle. + - clock-frequency : specifies the frequency driving the timer. + +Example: + +timer@500 { + compatible = "fsl,mpc8360-gtm", "fsl,gtm"; + reg = <0x500 0x40>; + interrupts = <90 8 78 8 84 8 72 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; +}; + +timer@440 { + compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm"; + reg = <0x440 0x40>; + interrupts = <12 13 14 15>; + interrupt-parent = <&qeic>; + /* filled by u-boot */ + clock-frequency = <0>; +}; |