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authorTakashi Iwai <tiwai@suse.de>2009-12-14 18:01:56 +0100
committerTakashi Iwai <tiwai@suse.de>2009-12-14 18:01:56 +0100
commitb89371621e5bedc84498ced2c5c33976bd1b2f64 (patch)
treeb309919239586e25617a17785b827577b1abb6b5 /Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
parentsound: add Edirol UA-101 support (diff)
parentALSA: sb_mixer: convert pointer tables to mixer control tables (diff)
downloadlinux-b89371621e5bedc84498ced2c5c33976bd1b2f64.tar.xz
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Merge branch 'next/isa' into topic/misc
Diffstat (limited to 'Documentation/powerpc/dts-bindings/fsl/mpc5200.txt')
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/mpc5200.txt10
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diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
index 8447fd7090d0..cabc780f7258 100644
--- a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
@@ -178,3 +178,13 @@ External interrupts:
external irq3: interrupts = <1 3 n>;
'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low)
+fsl,mpc5200-mscan nodes
+-----------------------
+In addition to the required compatible-, reg- and interrupt-properites, you can
+also specify which clock source shall be used for the controller:
+
+- fsl,mscan-clock-source- a string describing the clock source. Valid values
+ are: "ip" for ip bus clock
+ "ref" for reference clock (XTAL)
+ "ref" is default in case this property is not
+ present.