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| author | Thierry Reding <treding@nvidia.com> | 2017-10-12 19:12:57 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-12-13 14:36:36 +0100 |
| commit | c57997bce423fb71334a1fefa524569e48a1718f (patch) | |
| tree | cc01f3938060f960a0b8b3f3a52f17408ad47389 /Documentation/scheduler/sched-deadline.txt | |
| parent | drm/tegra: sor: Parameterize register offsets (diff) | |
| download | linux-c57997bce423fb71334a1fefa524569e48a1718f.tar.xz linux-c57997bce423fb71334a1fefa524569e48a1718f.zip | |
drm/tegra: sor: Add Tegra186 support
The SOR found on Tegra186 is very similar to the one found on Tegra210
and earlier. However, due to some changes in the display architecture,
some programming sequences have changed and some register have moved
around.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/scheduler/sched-deadline.txt')
0 files changed, 0 insertions, 0 deletions