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| author | Beata Michalska <beata.michalska@arm.com> | 2021-06-03 16:06:27 +0200 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2021-06-24 09:07:51 +0200 |
| commit | adf3c31e18b765ea24eba7b0c1efc076b8ee3d55 (patch) | |
| tree | 097810c605920c329f9549d0dc595b2e46f67b85 /Documentation/trace/postprocess | |
| parent | sched/topology: Rework CPU capacity asymmetry detection (diff) | |
| download | linux-adf3c31e18b765ea24eba7b0c1efc076b8ee3d55.tar.xz linux-adf3c31e18b765ea24eba7b0c1efc076b8ee3d55.zip | |
sched/doc: Update the CPU capacity asymmetry bits
Update the documentation bits referring to capacity aware scheduling
with regards to newly introduced SD_ASYM_CPUCAPACITY_FULL sched_domain
flag.
Signed-off-by: Beata Michalska <beata.michalska@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Link: https://lore.kernel.org/r/20210603140627.8409-4-beata.michalska@arm.com
Diffstat (limited to 'Documentation/trace/postprocess')
0 files changed, 0 insertions, 0 deletions