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author | Marc Zyngier <marc.zyngier@arm.com> | 2015-09-30 13:05:17 +0200 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2015-10-09 23:16:57 +0200 |
commit | 6d32ab2d8a982ffd46c4dcad9739292f57bc26de (patch) | |
tree | 9acf0cba051715af0af4c43c32f279ded3b8d4ea /Documentation/unicode.txt | |
parent | irqchip/gic: Warn if GICv3 system registers are enabled (diff) | |
download | linux-6d32ab2d8a982ffd46c4dcad9739292f57bc26de.tar.xz linux-6d32ab2d8a982ffd46c4dcad9739292f57bc26de.zip |
arm64: Update booting requirements for GICv3 in GICv2 mode
The current requirements do not describe the case where a GICv3
system gets booted with system register access disabled, and
expect the kernel to drive GICv3 in GICv2 mode.
Describe the expected settings for that particular case.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'Documentation/unicode.txt')
0 files changed, 0 insertions, 0 deletions