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authorIngo Molnar <mingo@kernel.org>2017-04-11 08:42:47 +0200
committerIngo Molnar <mingo@kernel.org>2017-04-11 08:42:47 +0200
commit84b1e36a6aee080ea01256659e2957114a0a52b5 (patch)
treee105aceb0f5aac46dbed0cb86ec28656cce44f35 /Documentation/virtual/kvm/devices/arm-vgic.txt
parentMerge tag 'perf-core-for-mingo-4.12-20170404' of git://git.kernel.org/pub/scm... (diff)
parentLinux 4.11-rc6 (diff)
downloadlinux-84b1e36a6aee080ea01256659e2957114a0a52b5.tar.xz
linux-84b1e36a6aee080ea01256659e2957114a0a52b5.zip
Merge tag 'v4.11-rc6' into perf/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'Documentation/virtual/kvm/devices/arm-vgic.txt')
-rw-r--r--Documentation/virtual/kvm/devices/arm-vgic.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/devices/arm-vgic.txt b/Documentation/virtual/kvm/devices/arm-vgic.txt
index 76e61c883347..b2f60ca8b60c 100644
--- a/Documentation/virtual/kvm/devices/arm-vgic.txt
+++ b/Documentation/virtual/kvm/devices/arm-vgic.txt
@@ -83,6 +83,12 @@ Groups:
Bits for undefined preemption levels are RAZ/WI.
+ For historical reasons and to provide ABI compatibility with userspace we
+ export the GICC_PMR register in the format of the GICH_VMCR.VMPriMask
+ field in the lower 5 bits of a word, meaning that userspace must always
+ use the lower 5 bits to communicate with the KVM device and must shift the
+ value left by 3 places to obtain the actual priority mask level.
+
Limitations:
- Priorities are not implemented, and registers are RAZ/WI
- Currently only implemented for KVM_DEV_TYPE_ARM_VGIC_V2.