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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-03-04 17:28:37 +0100
committerWolfram Sang <wsa@the-dreams.de>2014-03-05 17:29:19 +0100
commit370136bc67c3f502ec96446e502ba80b94150f9d (patch)
tree496a317839161e9af290463fc8f4b61c35287c52 /Documentation
parenti2c: i2c-rcar: deprecate class based instantiation (diff)
downloadlinux-370136bc67c3f502ec96446e502ba80b94150f9d.tar.xz
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i2c: mv64xxx: Add reset deassert call
The Allwinner A31 SoC using that IP has a reset controller maintaining it reset unless told otherwise. Add some optional reset support to the driver. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
index 582b4652a82a..21062bc3408d 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
@@ -16,6 +16,7 @@ Optional properties :
- clock-frequency : Desired I2C bus clock frequency in Hz. If not set the
default frequency is 100kHz
+ - resets : phandle to the parent reset controller
Examples: