diff options
author | Olof Johansson <olof@lixom.net> | 2018-08-24 17:49:48 +0200 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2018-08-24 17:49:48 +0200 |
commit | c37aad3612c4a9e01ca69ad07b8ca41dbd222c46 (patch) | |
tree | e4c31d48a1491b8c78825ba5335bf2d59cd7640e /Documentation | |
parent | Merge tag 'v4.18-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git... (diff) | |
parent | reset: meson: add meson audio arb driver (diff) | |
download | linux-c37aad3612c4a9e01ca69ad07b8ca41dbd222c46.tar.xz linux-c37aad3612c4a9e01ca69ad07b8ca41dbd222c46.zip |
Merge tag 'reset-for-4.19-2' of git://git.pengutronix.de/git/pza/linux into next/late
Reset controller changes for v4.19, part 2
This adds a single new driver for the Amlogic Meson Audio Memory Arbiter
resets.
* tag 'reset-for-4.19-2' of git://git.pengutronix.de/git/pza/linux:
reset: meson: add meson audio arb driver
reset: meson: add dt-bindings for meson-axg audio arb
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt new file mode 100644 index 000000000000..26e542eb96df --- /dev/null +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt @@ -0,0 +1,21 @@ +* Amlogic audio memory arbiter controller + +The Amlogic Audio ARB is a simple device which enables or +disables the access of Audio FIFOs to DDR on AXG based SoC. + +Required properties: +- compatible: 'amlogic,meson-axg-audio-arb' +- reg: physical base address of the controller and length of memory + mapped region. +- clocks: phandle to the fifo peripheral clock provided by the audio + clock controller. +- #reset-cells: must be 1. + +Example on the A113 SoC: + +arb: reset-controller@280 { + compatible = "amlogic,meson-axg-audio-arb"; + reg = <0x0 0x280 0x0 0x4>; + #reset-cells = <1>; + clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; +}; |