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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-08-30 00:58:00 +0200
committerPaul Mackerras <paulus@samba.org>2006-08-30 02:36:18 +0200
commit3efbdd136e52ee4028b5bb5b848a6043cf61cd6e (patch)
treed4851042f801f1d612565b10611dd002e566086b /Documentation
parent[POWERPC] Fix performance regression in IRQ radix tree locking (diff)
downloadlinux-3efbdd136e52ee4028b5bb5b848a6043cf61cd6e.tar.xz
linux-3efbdd136e52ee4028b5bb5b848a6043cf61cd6e.zip
[POWERPC] Fix MPIC sense codes in documentation
The booting-without-of.txt had incorrect definition for the sense codes for an OpenPIC controller Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/powerpc/booting-without-of.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 8c48b8a27b9c..5c0ba235f5a5 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1136,10 +1136,10 @@ Sense and level information should be encoded as follows:
Devices connected to openPIC-compatible controllers should encode
sense and polarity as follows:
- 0 = high to low edge sensitive type enabled
+ 0 = low to high edge sensitive type enabled
1 = active low level sensitive type enabled
- 2 = low to high edge sensitive type enabled
- 3 = active high level sensitive type enabled
+ 2 = active high level sensitive type enabled
+ 3 = high to low edge sensitive type enabled
ISA PIC interrupt controllers should adhere to the ISA PIC
encodings listed below: