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| author | Seth Heasley <seth.heasley@intel.com> | 2013-06-20 01:59:57 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2013-06-20 21:32:27 +0200 |
| commit | f39901c1befa556bc91902516a3e2e460000b4a8 (patch) | |
| tree | 559af938648d1c5e50c897d5d1bdba892fd03eac /Documentation | |
| parent | i2c: omap: correct usage of the interrupt enable register (diff) | |
| download | linux-f39901c1befa556bc91902516a3e2e460000b4a8.tar.xz linux-f39901c1befa556bc91902516a3e2e460000b4a8.zip | |
i2c: i801: SMBus patch for Intel Coleto Creek DeviceIDs
This patch adds the i801 SMBus Controller DeviceIDs for the Intel Coleto Creek PCH.
Signed-off-by: Seth Heasley <seth.heasley@intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/i2c/busses/i2c-i801 | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index d55b8ab2d10f..d29dea0f3232 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -24,6 +24,7 @@ Supported adapters: * Intel Lynx Point-LP (PCH) * Intel Avoton (SOC) * Intel Wellsburg (PCH) + * Intel Coleto Creek (PCH) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller |