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authorSeungwon Jeon <tgih.jun@samsung.com>2014-04-23 10:15:08 +0200
committerChris Ball <chris@printf.net>2014-05-13 00:08:10 +0200
commitc373eb489b27b268c9b8c267b212d10864bc8cdd (patch)
tree4b12ba22b66763b392c0ab1b9e8335fa74b17cee /Documentation
parentmmc: add support for HS400 mode of eMMC5.0 (diff)
downloadlinux-c373eb489b27b268c9b8c267b212d10864bc8cdd.tar.xz
linux-c373eb489b27b268c9b8c267b212d10864bc8cdd.zip
mmc: core: add DT bindings for eMMC HS400 1.8/1.2V
Provide the option to configure these speed modes per host, for those host driver's that can't distinguish this in runtime. Specially, if host can support HS400, it means that host can also support HS200. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/mmc/mmc.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt
index 9dce540771fb..3c18001dfd5d 100644
--- a/Documentation/devicetree/bindings/mmc/mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc.txt
@@ -38,6 +38,8 @@ Optional properties:
- mmc-highspeed-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
+- mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
+- mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
*NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
polarity properties, we have to fix the meaning of the "normal" and "inverted"