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authorTomasz Figa <t.figa@samsung.com>2013-04-04 06:32:37 +0200
committerKukjin Kim <kgene.kim@samsung.com>2013-04-04 08:51:08 +0200
commit74f7f8ba5092a76da1e9d07f245575cef86f15ab (patch)
treeee960840ee8829cedb53d6a083a5a836666c3398 /Documentation
parentclk: exynos4: Correct sclk_mfc clock definition (diff)
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clk: exynos4: Use mout_mpll_user_* on Exynos4x12
Many clock muxes of Exynos 4x12 uses mout_mpll_user_* clocks instead of sclk_mpll as one of their parents. This patch moves such clocks from common array into SoC-specific arrays and adjusts their parent lists respectively. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/exynos4-clock.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
index 8b58232f3fb5..d029605b9874 100644
--- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
@@ -42,6 +42,8 @@ Exynos4 SoC and this is specified where applicable.
aclk100 14
aclk160 15
aclk133 16
+ mout_mpll_user_t 17 Exynos4x12
+ mout_mpll_user_c 18 Exynos4x12
[Clock Gate for Special Clocks]