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authorDave Martin <Dave.Martin@arm.com>2017-10-31 16:51:18 +0100
committerWill Deacon <will.deacon@arm.com>2017-11-03 16:24:20 +0100
commit07d79fe7c22364de34618e58b92a8f091bd7e03d (patch)
tree67fa2e759028537d92569687a2a87ac3c187a9a6 /Documentation
parentarm64/sve: KVM: Treat guest SVE use as undefined instruction execution (diff)
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arm64/sve: KVM: Hide SVE from CPU features exposed to guests
KVM guests cannot currently use SVE, because SVE is always configured to trap to EL2. However, a guest that sees SVE reported as present in ID_AA64PFR0_EL1 may legitimately expect that SVE works and try to use it. Instead of working, the guest will receive an injected undef exception, which may cause the guest to oops or go into a spin. To avoid misleading the guest into believing that SVE will work, this patch masks out the SVE field from ID_AA64PFR0_EL1 when a guest attempts to read this register. No support is explicitly added for ID_AA64ZFR0_EL1 either, so that is still emulated as reading as zero, which is consistent with SVE not being implemented. This is a temporary measure, and will be removed in a later series when full KVM support for SVE is implemented. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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